A popular topic for discussion in the semiconductor industry concerns fab productivity and the need to move to a 450 mm wafer size. This idea makes many people somewhat tense, because migrations to larger wafers have, ironically, carried with them manufacturing inefficiencies. Inefficiencies at the 150 and 200 mm wafer size became even more wasteful at 300 mm. The move to a 450 mm wafer size promises waste in terms of raw wafer processes and raises a logical question: "When will the industry reach production quantities of 450 mm wafers, and how much retooling will be required to grow, pull, slice and polish this size wafer?"
Setting aside such raw-wafer issues, let's discuss the components of fab productivity. In its simplest form, fab productivity is the measure of revenue die produced per fab per hour. The number of revenue die produced per fab per hour must take into account many components of productivity.
For example, how much does a fab-hour cost? Are there opportunities for significant improvements in fab productivity that are independent of wafer size? To answer such questions, both direct and indirect costs must be considered. Direct, fixed costs include: Real estate Facilities Taxes Plant depreciation Equipment depreciation
Variable costs include: Raw-wafer costs Consumables Labor — operators, process engineering support, equipment engineering and maintenance Equipment — production hours/year, maintenance costs and operating costs Utilities
The obvious productivity targets are the variable costs. Table 1 lists many cost reduction targets and the methods used to address these goals.
The objective is very simple: Only process wafers that are revenue wafers; the processing of test (monitor) wafers and scrap wafers should not be permitted. Consumables should only be used on revenue wafers — not test or scrap wafers. Automation technology should be tuned to processes to keep tools in spec, online and producing revenue wafers. Automation technology is designed to collect data and automate process optimization to minimize hands-on, process tweaking by process engineers and operators. Machine should be taken offline for maintenance only when recipes cannot be tuned to keep the machine within specification.
The cost of lost productivity can be estimated (see "Lost Productivity Examples," this page). Based on your fab costs and production rates, one can fill in some of these blanks and make estimates. In the text that follows, you will be able to derive some numbers to plug into your fab model.
Real-world examples
Using some real-world examples and case studies, we present here some data that will give you guidelines to easily achievable productivity improvements. Let's look at these by process and equipment; we'll then examine fab-level productivity gains.
"Improvements at the Equipment Level Using Run-to-Run Control" provides examples of the types of productivity gains that can be achieved with run-to-run control at the equipment level. Such advances can translate to significant productivity gains at the wafer/die levels and also fab level.
The Fab #2 example provides some real-world numbers that you can plug in your fab data and calculate the possible fab productivity gains.
Fab-level productivity improvement
Having examined what is possible at the equipment level, let's look at fab-level productivity improvement. With the equipment productivity improvement as a basis for tool-level improvements, the calculation can be escalated to the fab level to estimate overall improvements in fab productivity.
Summarizing the equipment and fab-level productivity gains shown in the two sidebars, Table 2 provides some numbers that can be plugged into a fab model to calculate the improvements that you may expect from a fab-level implementation of run-to-run control.
Looking ahead
As we contemplate the next wafer size, it is important to consider the manufacturing inefficiencies that pervade the industry. While semiconductor manufacturing may be the only discipline that consciously accepts the manufacture and processing of material to be scrapped — consuming expensive materials and valuable fab process time — we should plan for a time when all wafers are revenue wafers, process control is more automated and equipment monitoring is completely automated, with less intervention by equipment engineers, process engineers and operators.
We've come a long way from 25 mm to 300 mm wafer size, and 450 mm wafers are now seriously being considered. This is a good time to think about changing the way semiconductor devices are manufactured from two points of view: wafer size and wafer processes. As we see from the above data, there are numerous productivity gains to be achieved simply by improving the way existing factories operate. Beyond that, we might ask, should we go forward with larger wafers, using the manufacturing techniques we have today, or should we migrate away from analog manufacturing of digital devices to digital manufacturing of digital devices?
Table 1. Productivity Targets: Variable Costs TargetWhat can be doneHow to do itRaw waferEliminate wafer scrapBetter process controlEliminate operator errorConsumablesMinimize number of wafers processed for a given demandBetter process controlEliminate operator errorLabor, operator Assign more tools per operatorAutomate:• Machine selection• Lot move transaction at the tool• Recipe download to the tool• Engineering change notice on production recipes•Model-based tuning of process recipes and parametersLabor, process engineering supportReduce process engineering sustaining effortAutomate:• Process data collection• Process recipe optimization• Recipe downloads to the tool• Engineering change notice on production recipes•Model-based tuning of process recipes and parametersLabor, equipment engineering and maintenanceReduce downtime for maintenance, reduce equipment requalifications Automate:• Process data collection• Process tuning to keep equipment within spec • Feed forward/backward process data to other toolsEquipment productivityIncrease production hours per year Automatically tune and optimize recipes to keep tools online and operating within spec.Equipment productivityReduce maintenance costPerform maintenance when the tool can no longer be "tuned" to run within spec. Eliminate maintenance based solely on time or cycles.Equipment productivityReduce process requalification cycles per yearReduce the number of maintenance cycles per year; reduce machine time lost to requalification.
Table 2. Fab Model for Productivity Improvements Average Cpk improvement85%Scrap reduction10-40%Test wafer reduction35-40%Average capacity increase12%
Lost Productivity ExamplesCarl Fiorletta A scrapped wafer may cost ___% in lost production and $_____ in wafer cost, plus the amount of value added processing up to the point of scrapping the wafer. Keeping tools online longer may increase production capacity by ___%. Process engineering and equipment maintenance personnel may cost $____ per year. Taking equipment down for maintenance based on time or cycles instead of the tool's ability to meet spec typically costs $_____ per year (or ____ machine/hours per year) in lost capacity.ROI worksheets comprehend these costs and help roll up the net gains fab productivity improvement.
Improvements at the Equipment Level Using Run-to-Run ControlCarl FiorlettaCMP tool, Strasbaugh: Sigma-55%Fewer look-aheadsMean centering+85%Automatic SPC (24/7) with forced tool shutdownCpk+100%Rework-10%Less operator influenceScrap-8%Real deterministic dataLitho overlay control tools: Canon tool I4/I5 deep UV stepper, KLA 5100 metrology, FSI litho cell, with ASML stepper (Using model-based control to calculate overlay parameters based on previous lot measurements on a run-to-run basis.) • Fab capital avoidance$20M• Rework reduction75%• Cpk improvement+40%• Probe yield improvement+4-6%• Process engineering effort-50%• Automatically control: X & Y mark-shift, X & Y scaling, magnification• Automatically adjust: 15,000 controller parametersGate etch tool: Applied 5200 (Using model-based control to calculate etch time.) • Identified major sources of process variation:• Photo process, stepper-to-stepper variation• Etch, device-to-device variation• Cpk improvement: 2.04-3.44• Eliminate 8 hrs cycle time per lot via reduced test wafers• Single control strategy: Etchers, 3 targets, 200,000 parameters (steppers) × (etchers) × (reticles)CMP tool: Applied Mirra (Using run-to-run control to control polish time. The goals included increasing Cpk, decreasing test/pilot wafers and decreasing rework) • Fab capital avoidance$36M• Equipment throughput +25%• Wafer rework -7%• Scrap reduction40%• Cpk improvement150%• Test wafer reduction40%
Fab-Level Productivity Improvement Using Run-to-Run ControlCarl FiorlettaFab #1: Wafer starts: 17,500/moTools managed by run-to-run/model-based process controlImprovements with run-to-run control 12% fab-level capacity increase25% increase in tool productivity (includes reduction in test and monitor wafers)2% increase in probe yield, via improved process control and reduced process variabilityFab #2: 45,000 wafers/moImprovements with run-to-run control 12% fab capacity increase$23.4M revenue increase for the fab (wafer die)$117M revenue Increase for the fab (packaged die)Fab #3: Improvements with run-to-run control 20% fab capacity increase25% increase in machine hours/yr90% reduction in test and scrap wafers96% reduction in rework3-10% increase in yieldAdditional value to the fab Reduced process engineering timeReduced capital equipment requirements: $20M in litho, $36M in CMPIncrease in revenue and profit. These numbers depend on annual volume and value per wafer or packaged die.
Carl Fiorletta is the marketing director at Adventa Control Technologies. In 1993, at the conclusion of the MMST (Microelectronics Manufacturing Science and Technology) program at Texas Instruments, Carl's responsibility was to commercialize the software, machine design and sensor designs that were developed in the program. In 1998, Carl was part of the management team that created the Adventa Co. Prior to the MMST program, he was a co-founder of Veeco Integrated Automation. Before his involvement in the semiconductor industry, he was vice president of marketing for LSC Systems and product line manager for Sciaky International. Carl holds a B.S. from the University of North Texas. Phone: 1-972-543-1754 E-mail: c-fiorletta@adventact.com