VaST Systems and Tensilica have announced that models of Tensilica processors are now available from VaST Systems for the VaST CoMET System Engineering Environment.
Customers of both Tensilica’s fully configurable Xtensa processor products and off-the-shelf Diamond Standard series will be able to easily import the cycle accurate instruction set simulator provided by Tensilica into the VaST platform for early architectural exploration and software development and debugging.
Chip designers can test their Tensilica processor-based designs early in the design cycle with real software using VaST virtual system prototypes, significantly shortening the overall design cycle compared to traditional design methods and allowing designers to test design trade-offs while changes can still be cost-effectively made.
"This technology allows customers to dramatically reduce time to market by creating complete high-speed, cycle-accurate models of their products prior to IC design implementation or hardware prototyping," said Jeff Roane, vice president of marketing for VaST Systems.
Driven by strong customer demand for both VaST and Tensilica products, this integration brings productivity enhancing design capability to the customer base.
Mutual customers will have an end-to-end design flow to rapidly configure multiple architectural candidates and verify the candidate's in-system on real software.
"More and more of our customers are making virtualization solutions an integral part of their overall design flow. Working with VaST allows us to better satisfy customer demand. VaST’s solutions allow our customers to check in-system performance and make critical cost, performance, and power trade-offs to determine the best Xtensa processor configuration for their needs," stated Steve Roddy, Tensilica’s vice president of marketing and business development.