Sapphicon Semiconductor Australia , a designer and manufacturer of high performance integrated circuits based on Silicon-on-Sapphire (SoS) process technology, and AWR Corporation, the innovation leader in high-frequency EDA, announce process design kits (PDKs) for AWR software that support Sapphicon's advanced SoS processes.
AWR's Analog Office RFIC design software is used to develop Sapphicon PDKs because of its ability to provide extremely accurate models. Sapphicon Semiconductor presently offers AWR PDKs for all variants of its 0.25 µm process and are currently working on PDKs covering their 0.5 µm high frequency RF/Mixed Signal complementary metal oxide semiconductor (CMOS) processes.
SoS is an ideal process for high-frequency and mixed-signal devices as its insulating substrate eliminates parasitic capacitances from the circuit, enabling high frequencies, low power consumption, and high Q passives (e.g. Inductor QL > 40 at 2 GHz). Transistors created using the SoS technology have much lower junction capacitance and thus have fewer non-linearities at high frequencies than those manufactured on standard CMOS processes.
"A key aim is to develop highly accurate models for transistors and passives, like spiral inductors, at frequencies up to 40GHz," said Yash Moghe, Sapphicon's design engineering manager. "Analog Office software enables us to accurately model active devices, passives, and interconnects on SoS so that our customers realize first-time-right designs."
"This partnership extends our reach by providing Analog Office customers with access to a wider variety of process technologies," said Graeme Ritchie, RFIC segment manager at AWR, "such as Sapphicon Semiconductor 's SoS technology which is ideal for RF and mixed signal CMOS designs."