Mentor Graphics has entered a technology partnership with Sharp that will see the latter’s Bach hardware compilation technology merged with Mentor’s Seamless co-verification tool.
This merger of co-verification and hardware compilation technologies will create a new set of design optimisation and analysis tools for embedded system and system-on-chip (SoC) designs, according to Sharp Europe Labs research supervisor Dr Paul Boca.
“Combining Seamless and Bach will provide designers with a new approach to embedded system design,” Dr Boca said.
“Starting from a description in untimed behavioural C, designers will be able to explore different hardware/software partitions using Seamless co-verification technology from Mentor Graphics and efficiently compile hardware blocks to circuits with our hardware compilation technology.”
Sharp’s hardware compilation technology allows abstract descriptions of hardware in C to be simulated and synthesised into RTL.
This can be combined with Seamless C-Bridge technology to enable efficient system level co-verification of designs that include both C and HDL representations of hardware and embedded software.
New combined product offerings will be available in 2003.