ST Microelectronics has announced that its CMOS 28nm process is now available for prototyping to universities, research labs and companies through the silicon brokerage services provided by Circuits Multi Projets (CMP).
The introduction of the CMOS 28nm process builds on the successful collaboration that has allowed universities and companies to access previous CMOS generations. CMP is also offering 65nm and 130nm SOI (Silicon-On-Insulator), as well as 130nm SiGe processes from ST Microelectronics.
“There has been a great interest in designing ICs in these processes, with about 300 projects having been designed in 90nm (phased out in 2009), and 200 already in 65nm,” says Bernard Courtois, Director of CMP.
“In addition, 60 projects have already been designed in 65nm SOI and it is interesting to note that many top universities in Europe, in the USA and in Asia have taken advantage of the CMP / ST offer,” he adds.
The CMP multi-project wafer service allows organisations to obtain small quantities - typically from a few tens to a few thousand units - of advanced ICs.
“This very exciting program perfectly illustrates our strong involvement with the education and research communities. It is essential that university students and researchers can have access to the most advanced technologies, which we have been provided in cooperation with CMP for two decades,” says Patrick Cogez, Director, Universities and External Relations, Front-End Technology and Manufacturing at ST Microelectronics.
“Ensuring that universities have access to our leading-edge technologies also helps us to attract the best young engineers as part of our commitment to remain a technology leader on a long-term basis,” he concludes.