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Intel quad processors to arrive in November

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intel will ship the first quad-core processors for PCs and high-volume servers in November, according to president and CEO Paul Otellini, speaking at the Intel Developer Forum in San Francisco.

The industry’s first quad core processors will be designed for PCs and high-volume servers.

The Core 2 Extreme quad-core processor will provide gamers with 67% better performance than the company’s current Core2 Extreme processor. This first processor will be followed by a processor designed for mainstream users in the first quarter of 2007.

Also due are the Quad-Core Intel Xeon processor 5300 series for dual-processor servers, as well as a low-power 50W Quad-Core Xeon processor L5310 for blade servers that will be shipped in the first quarter of 2007.

Otellini said the advent of new operating systems, more lifelike games, online video and high-definition video were continuing to drive the need for more processing power, claiming that a single You Tube stream today would hobble a PC from just a few years ago.

“As we move to high definition video, users will need eight times greater performance just for encoding”, Otellini said.

“More than ever processing power matters, even as the need to reduce heat, extend battery life, and reduce electricity costs in data centres becomes more critical.

“Silicon technology is at the heart of the solution. It is how we get there.

“The industry is going through the most profound shift in decades, moving into an era where performance and energy efficiency are critical in all market segments and all aspects of computing”, Otellini said.

“The solution begins with the transistor and extends to the chip and platform levels.”

Otellini claimed Intel’s next-generation 45nm technology is on track for production in the second half of 2007 as planned, and added that the company has 15 45nm products already in development across desktop, mobile and enterprise segments.

The first of these products is on track to complete its design in the fourth quarter of this year.

At the forum Otellini also outlined Intel’s plans to introduce new micro-architectures about every two years, with 45nm products coming in 2008 and 32nm due in 2010. He said these micro architectures will be developed by separate teams working in parallel.

“By the end of the decade we will deliver a 300% increase in performance per watt over today’s processors”, he said. “This improved power and performance will enable developers and manufacturers to develop systems with incredibly exciting new capabilities.”

To demonstrate how Moore’s Law will continue well into the future with amazing potential, Otellini showed a new research prototype processor that has 80 simple floating point cores on a single die.

The tiny silicon die on this experimental chip, just 300mm2, is capable of achieving a Teraflop of performance, or 1 trillion floating point operations per second.

He contrasted this with Intel’s first Teraflop supercomputer, a massive machine powered by nearly 10,000 Pentium Pro processors in more than 85 large cabinets occupying about 2,000 square feet.

At the same forum Intel’s chief technology officer Justin Rattner outlined the technical challenges of delivering Teraflop performance and terabytes of bandwidth.

He said this performance would be needed to keep up with increasing demand by consumers and businesses for Internet-based software, services and media-rich experiences.

He also said that online software services, hosted by mega data centres with more than a million servers, will allow people to access personal data, media and applications from any high-performance device to play photo-realistic games, share real-time video and do multimedia data mining.

“The rise of mega data centres and the need for high-performance personal devices will require the industry to innovate at every level, from many-core processors to higher-speed communications between systems, while delivering better security and energy efficiency”, Rattner said.

“Solving these challenges will bring benefits to all computing devices while creating new markets and opportunities for developers and systems designers.”

Rattner outlined the importance of three major silicon breakthroughs. Intel’s tera-scale research prototype silicon, the world’s first programmable Teraflop processor.

Containing 80 simple cores and operating at 3.1 GHz, the goal of this experimental chip is to test interconnect strategies for rapidly moving terabytes of data from core to core and between cores and memory.

“When combined with our recent breakthroughs in silicon photonics, these experimental chips address the three major requirements for tera-scale computing – teraOPS of performance, terabytes-per-second of memory bandwidth, and terabits-per-second of I/O capacity.

“While any commercial application of these technologies is years away, it is an exciting first step in bringing tera-scale performance to PCs and servers.”

The second major innovation is a 20 megabyte SRAM memory chip that is stacked on and bonded to the processor die. Stacking the die makes possible thousands of interconnects and provides more than a terabyte-per-second of bandwidth between memory and the cores.

Rattner also demonstrated the recently announced Hybrid Silicon Laser chip developed in collaboration with researchers at University of California, Santa Barbara, allowing dozens or hundreds of hybrid silicon lasers to be integrated with other silicon photonic components onto a single silicon chip.

This could lead to a terabit-per-second optical link capable of speeding terabytes of data between chips inside computers, between PCs, and between servers inside data centres.

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