While consumers eagerly anticipate the promise of next generation wireless applications, designers are busy working out how it can be done. A new range of Flash memories from Intel that employ up to five ultra-thin stacked memory dies may be a vital piece in the puzzle.
Using the company’s Ultra Thin Stacked Chip-Scale Packaging (CSP) technology, the L18/L30 1.8-V NOR StrataFlash wireless memories are designed to make it easier for manufacturers to cram features such as cameras, games and email into increasingly thin mobile phones. Fabricated on 4th generation Multi Layer Cell (MLC) technology using 0.13-µm process lithography, Intel claims the L18/L30 will enable designs that are reliable, high performance and cost effective - and offer a low power consumption to boot. Music to the ears of mobile phone developers.
The company performs this feat of miniaturisation by using the stacked-CSP process, a variation of thin CSP packaging that uses better wafer thinning and package technology to obtain lower profile heights and more stacking flexibility. By storing two bits of information in each memory cell instead of just one, StrataFlash memory allows twice the information to be stored in the same space. The result is a Flash architecture with up to five stacked dies and a total package height as low as 1.0 mm. Offered as SRAM, PSRAM and LP-SDRAM options, the company says 512-Mbit variants will be available this year, while we will have to wait until next year for 1-Gbit types.
Although next generation systems are much more data intensive and require much higher throughput rates than current mobile technologies, the new devices have a few tricks to make a designers life easier.
Read While Write/Erase (RWW/E) operation means flexible partition operation, allowing a processor to execute code out of one partition and simultaneously write or erase in another partition, improving write and retrieval speeds by up to 40 percent. Full 1.8-V operation permits RWW/E over the entire voltage range, with support for 1.8-V logic, producing energy savings of up to 60 percent. Energy savings over time translate to reduced power consumption and extended battery life.
Potential memory bottlenecks are removed by accessing the Flash memory contents with asynchronous page and synchronous burst reads. Intel maintains these fast reads can allow for direct execution with zero wait states at a 54 MHz bus speed on a 1.8 V system for example.
Intel has been stacking CSPs for years. Early on, the company customised stacked-CSP products for manufacturers that wanted to offer high-end functionality on their mobile phones. The release of the technology to the mainstream marks an attempt to bring stacking to the market using a high-volume manufacturing approach.
“Stacking is quickly going mainstream in the mobile wireless market segment,” explains Darin Billerbeck, vice president of Intel’s Flash Product Group. “By combining highly dense Strataflash memory in an ultra thin Stacked-CSP package, our wireless customers receive the Flash density needed for their feature rich phones, while at the same time saving space for small design footprints.”
Intel has its work cut out though. NEC Electronics, Fujitsu and arch-enemy AMD are just three companies that already have comparable products on the market.