Home > VMETRO’s 3U VPX FPGA processing engine available from Dedicated Systems Australia

VMETRO’s 3U VPX FPGA processing engine available from Dedicated Systems Australia

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article image VMETRO’s 3U VPX FPGA processing engine

VMETRO, providers of embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, have announced the release of 3U VPX FPGA processing engine supporting the new FPGA mezzanine card (FMC/VITA 57) standard.

The FPE320 incorporates the Xilinx Virtex-5 FPGAs available with an FMC mezzanine site. This combination of high-performance FPGA processing and the flexibility of FMC-based I/O in an air-or conduction-cooled 3U VPX package is suitable for demanding real-time applications such as Electronic Warfare (EW) and Signal Intelligence (SIGINT), Electronic Counter Measures (ECM) and UAV sensor acquisition. The 3U VPX FPGA processing engine supporting the new FPGA mezzanine card (FMC/VITA 57) standard is available from Dedicated Systems Australia .

With the advent of the FMC mezzanine site the available Virtex-5 FPGAs can be used in 3U systems because the I/O space requirements have been minimised. The FPE320 supports the Xilinx Virtex-5 SXT, LXT and FXT FPGAs in the FF1738 package and has a single FMC (VITA 57) mezzanine site for I/O. In addition, it also provides two banks of DDR2 SDRAM and two banks of QDRII SRAM memory along with four x4 high-speed serial interconnects to the backplane for PCI Express, Aurora or Serial RapidIO and additional lower-speed I/Os to the backplane.

Development for the FPE320 is supported by the VMETRO’s FusionXF development kit. FusionXF includes a Software Development Kit (SDK) and an HDL Development Kit (HDK). The SDK provides host software support for Windows, VxWorks and Linux including drivers for high-speed DMA access between the XMC and host CPU, FPGA reconfiguration and diagnostics. The HDK, containing the FPGA interface definitions and HDL, functions to build a fully functional FPGA design. Example software and HDL are provided for the interconnects and the external memory with the Virtex-5 FPGA.

The FPE320 is a VPX compliant with 0.8” pitch and is available in both air and conduction cooled versions.

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