Who says complex programmable logic devices (CPLDs) are a dying breed, squeezed out by FPGAs and structured ASICs? (See article page 28 this issue). Certainly not Altera (distributed by Braemac ). The company is launching its MAX II family, which it says employs “a radical new version of the CPLD architecture”. In contrast to traditional CPLDs, MAX II devices are built on a 0.18-μm embedded Flash process based on a look-up table (LUT) architecture, borrowed from FPGA technology. The company says it is “the first programmable logic supplier to offer embedded Flash memory for user applications within a programmable logic device”. The use of embedded Flash allows the MAX II chips to replace serial or parallel EEPROMs.
The company explains the new family is half the cost, one-tenth the power, four times the density and twice the performance of its predecessor.
“Our customers are in search of an alternative to small and inflexible ASICs and ASSPs,” says Erik Cleage, Altera’s senior vice president of marketing. “This presents a giant opportunity to further the value proposition of CPLDs.”
Low cost and low power by design
Altera has departed from its traditional macrocell architecture and adapted the LUT structure. (See Figure 1.) The LUT-based architecture allows for die sizes that are one-quarter the size of competing devices on the same fabrication process. The company is claiming that the devices have the industry’s lowest dynamic power consumption making them suitable for battery-powered equipment.
The technology provides some performance and density gains. Altera says that MAX II devices are, on average, over twice as fast as prior generations - a result of improvements in routing architecture, software algorithms and process technology.
Users can reconfigure the devices in real time without interrupting functionality allowing the flexibility to re-program field-deployed systems.
Design support comes in the form of Quartus II design software. The package integrates with leading third-party synthesis and simulation tools. (A no-cost web edition can be downloaded from www.altera.com/q2webedition.) The Quartus II Web Edition software supports all members of the MAX II device family.
The family includes four members ranging in density from 240 to 2200 logic elements. Low-cost packages are available including 1.0-mm FBGAs and 0.5-mm TQFP packages. The first MAX II device, the EPM1270, will be available mid-2004. All family members will be available in full production by the first quarter of 2005.
Meanwhile, Altera’s arch-rival Xilinx (distributed by Insight Electronics ) has introduced a second-generation CPLD design kit
The kit is suitable for developing a broad range of industrial, data processing, communications and consumer electronics applications. Based on both the CoolRunner-II and XC9500XL product families, the US$49.99 ($70) kit provides the elements needed to develop, debug and complete a design, including software, cabling, training material and prototype board with pre-programmed CPLDs.
Xilinx has stepped up its presence in the highly competitive CPLD market segment this year, and claims that its product sales increased nearly 30 percent year-over-year in the December quarter.
“By combining our two primary technologies in one complete kit for under US$50, Xilinx enables the creation of next-generation systems faster and with lower risk than any other solution available,” claims Mark Halfman, director of marketing and applications for the CPLD division at Xilinx.