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Fighting for the 3G CMOS prize

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Bluetooth was the proving ground for implementing multi-gigahertz RF transceiver circuits on a cost-effective CMOS process. The success of CMOS RF advocate CSR is testament to that.

Yet silicon suppliers have not stopped there. The big prize for CMOS RF designs will be the next generation of cost and size sensitive 3G mobile phones.

Silicon Laboratories (distributed by Braemac ) is one supplier that has been shipping a GSM/GPRS mobile phone transceiver for two years. It was complemented last year with an integrated power amplifier (PA). But the mobile market is not standing still and now suppliers are looking at how to use the cost benefits of CMOS RF circuits in next-generation phones.

“3G designs are achievable in CMOS - no one should be scared about doing wideband CDMA RF designs in CMOS,” says Dan Rabinovitsj, VP of wireless products at Silicon Labs.

Despite Rabinovitsj’s confidence, these are relatively early days for using CMOS front ends in mobile phones. Take the back off many GSM handsets and it will be a gallium arsenide (GaAs), not silicon, RF front end and PA which you find, probably supplied by RF Micro Devices (RF Parts Australia). But that is the target market for silicon RF specialists such as Silicon Labs, TI, Renesas and National Semiconductor (Arrow).

It is the adoption of digital radio technologies such as GSM and CDMA that makes all CMOS RF mobile phone transceivers possible at all. Whereas implementation of classical radio architectures poses an almost insurmountable challenge in deep submicron CMOS, sampled-data radio architectures make possible the use of CMOS and the ability to scale with process.

The real cost benefits of all CMOS RF devices will only be realised if the chips can be fabbed on as near as possible a standard CMOS process in the foundry or ODM. But the inherent scaling of CMOS processes, driven by mainstream products, poses its own problems for RF circuits.

TI believes that scaling of CMOS to lower and lower voltage levels makes analogue design more difficult as process technology advances. Device modelling and process maturity early in the development of a new process node are generally inadequate for highly accurate parametric modelling required for these analogue type block designs.

According to TI, CMOS mobile phone radio designs have built heavily on analogue functions. Implementation of the analogue mixers, filters, and amplifiers in CMOS technology is difficult and the power consumption can be higher than for an alternative SiGe BiCMOS design.

While SiGe BiCMOS will easily achieve all the performance requirements needed for mobile phone front ends it does not offer the cost benefits of a pure CMOS RF design. According to Mark Norris, RF specialist at Cambridge Consultants, integrating a SiGe process can add as much as 30 percent to the mask costs.

Whereas all-CMOS designs can make use of the economies of scale of using standard CMOS foundries with a few tweaks in the process such as a thick metal layer for high Q inductors, an insulation layer for metal-insulator-metal (MIM) capacitors and perhaps a high resistivity polysilicon layer. “But these are not as involved as integrating SiGe,” says Norris.

Rabinovitsj at Silicon Labs argued that their approach is even simpler: “We do not believe you need a high resistivity substrate.”

More on this story at ferret.com.au/electronics.

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