Altera (distributed by Braemac ) has unveiled the Stratix II FPGA, said to offer over twice the logic density and 50 percent higher performance at 40 percent lower cost than first-generation Stratix devices. Claimed to be the industry’s biggest and fastest FPGA, Altera’s second generation device boasts an adaptable FPGA architecture and a logic structure optimised for DSP-based designs.
It is believed that FPGAs currently address more than half of all ASIC designs by density and performance. Target applications for the Stratix II family include high-end chip rate processing in cellular base stations, multi protocol aggregation, QoS traffic management and image processing for high resolution displays, all of which are ASIC domains. Additionally, the Stratix II family’s memory and performance bandwidth make it suitable for data processing on high performance line cards in a range of routers and edge switchers. Targeting more wireless base station applications, improvements were made to performance features that make Stratix II devices appropriate for VoIP solution gateways.
“Customers have expressed the need for a radical improvement in performance, capacity and cost in order for them to look beyond their traditional design platforms,” said Erik Cleage, Altera’s senior vice president of marketing. “Combining the benefits of ASICs and ASSPs with the flexibility of FPGAs provides customers with the best of both worlds.” The FPGA supports internal clock frequency rates of up to 500 MHz and typical design performance at over 250 MHz.
The adaptive logic module (ALM) includes an adder capability that allows designers to implement complex adders and multipliers utilising two thirds the logic of prior generation FPGAs. The embedded DSP blocks operate up to 370-MHz and offer dedicated multiplier and accumulator functions. The devices are built on TSMC’s 90-nm, all-copper process, using low-k dielectric material on 300-mm wafers.
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