Home > Cypress introduces 4-PLL timing chip with 2-wire I2C interface

Cypress introduces 4-PLL timing chip with 2-wire I2C interface

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Cypress Semiconductor Corp. introduced the 4-PLL (phase-locked loop) timing device with a 2-wire I2C programming interface. The I2C programming allows manufacturers to reduce time-to-market by programming frequencies on the printed circuit board (PCB) instead of having to order factory programmed parts or use an additional manufacturing step. It also allows customers to order one part number and use it for multiple products and design iterations, reducing inventory requirements.

The new CY24488 meets critical timing requirements in digital set-top boxes (STB), DVD recorders, digital TVs and other complex systems requiring synthesis of multiple, unrelated frequencies.

According to Cypress, as its recent design win with Hitachi shows, it offers superior timing solutions for the digital entertainment market. The addition of I2C programming gives customers another reason to choose Cypress for these applications.

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