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Signal integrity of FPGAs boosted by LVDS buffers

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article image Minimises simultaneous switching noise issues.

National Semiconductor Corporation, represented in Australia by Arrow Electronics Australia Pty Ltd, has introduced two new low-power, high-performance buffer/repeaters, the DS90LV004 and SCAN90004, for its industry-leading portfolio of LVDS (low-voltage differential signaling) products.

The DS90LV004 and SCAN90004 1.5Gbps, four-channel buffers are the first to include configurable output pre-emphasis, hot-plug protection and 15kV of electro-static discharge (ESD) protection.

The devices boost the signal integrity of field-programmable gate arrays (FPGAs) and application specific integrated circuits (ASIC) across backplanes and cables in telecom, datacom, industrial, medical, automotive and office imaging applications.

For designers who want to implement system-level test, the SCAN90004 features IEEE 1149.6 (JTAG) testability.

"The DS90LV004 and SCAN90004 dramatically improve the performance of a wide variety of designs driving high-speed signals," said product line director for the Interface division at National, Jeff Waters. "In FPGA- and ASIC-based designs, for example, these buffers minimise simultaneous switching noise issues, improve ESD protection, and deliver higher-speed and longer-reach signals over lower-cost cables and backplanes."

The four-channel DS90LV004 drives up to four LVDS clock and/or data channels over common backplanes or simple cable configurations. The wide differential input range easily interfaces to LVDS, low voltage positive emitter-coupled logic (LVPECL) or current mode logic (CML) input levels and the output levels are fully LVDS compliant.

The DS90LV004 operates at data rates up to 1.5Gbps and includes configurable output pre-emphasis that allows the designer to ‘overdrive’ the outputs to compensate for a lossy interconnect.

The DS90LV004 features the industry's highest 15kV of ESD protection for maximum isolation of expensive FPGAs, ASICs and other onboard components. In power-sensitive applications, the power-down mode is useful in minimising power consumption when all four channels of a single device are not active, such as in redundancy applications.

The SCAN90004 has the same features as the DS90LV004, and also includes IEEE standard 1149.1 and 1149.6 (JTAG) testability to verify high-speed differential connections in the system. These JTAG-accessible features extend the capability of an existing system or board-level JTAG bus to high-speed mixed-signal environments.

The DS90LV004 and SCAN90004 are available now in a 48-pin TQFP. An evaluation board and lead-free package options are also available.

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