ALTIUM has released a universal JTAG interface that makes it possible for engineers to use the full LiveDesign capabilities of Altium's Nexar system-level FPGA development software with virtually any third-party FPGA development board.
The interface makes it easy for developers to use their existing FPGA development boards to design and debug digital systems on an FPGA using Nexar without purchasing a LiveDesign-enabled development board.
The interface attaches to the parallel port of a computer and has a set of flying leads that connect to the target development board. The interface supports two independent JTAG connections, one to the JTAG programming pins of the target FPGA and the other to four general I/O pins of the FPGA used to establish a secondary, soft JTAG chain inside the device. The soft JTAG chain is used by Nexar to communicate in real time with active design elements. These include its processor cores and virtual instruments in the circuit implemented inside the FPGA.
The interface supports both the Xilinx ISE and Altera ByteBlaster cable standards, making it suitable for virtually any FPGA development board. Altium will provide additional support for specific development boards on its website in the form of downloadable constraint files as well as documentation and example projects. This will be particularly useful for engineers and FPGA developers looking to evaluate.
The interface can also be used with Protel, Altium's board-level design system, to allow interactive FPGA hardware design on third-party development boards.