Australian Windows-based EDA vendor Altium is claiming that its “Nexar” product is the first to provide a comprehensive, vendor-independent solution for system-level design on an FPGA platform.
Nexar is derived from the company’s “Board-on-Chip” technology, and integrates hardware design tools, embedded software development tools, Intellectual Property (IP)-based components, virtual instrumentation and a reconfigurable development board. The company says that this allows even engineers without HDL experience to design and implement a complete embedded system inside an FPGA.
The product claims to offer parallel design of hardware and software, greater flexibility in hardware/software design partitioning and a “live”, interactive design environment for system-on-FPGA development and debug.
While many engineers look to FPGA technology to provide higher levels of on-chip integration and a lower risk alternative to the cost and lead time of conventional ASICs, system-level design on an FPGA platform is a difficult exercise, says Altium, particularly when it comes to bringing the processor into the FPGA. Nexar is said to change this by taking board-level system design methodologies and retargeting them for FPGA architectures.
The result is a “system-on-FPGA” product for chip-level systems integration, practical hardware/ software co-design, a systems-level development environment for FPGA-based embedded design and an “interactive” design methodology called LiveDesign.
An IP delivery model
Nexar includes libraries of royalty-free, pre-synthesised, pre-verified IP components, including a range of processor cores, that can be dropped onto the schematic and connected together to form the system hardware.
The software’s components are processed for a variety of target FPGA architectures. This allows design portability between FPGA device families. The company says that the software “automatically and transparently selects the correct component model for the target architecture during system synthesis”. The component system provides a framework for FPGA IP delivery that avoids the security problems associated with supplying IP as HDL source code.
The product also includes a library of IP-based virtual instruments that can be incorporated into the design at the schematic level for debugging. The virtual instruments are supplied as pre-synthesised models that allow them to be used across FPGA target architectures. These instruments have on-screen front panels analogous to their physical counterparts to provide an intuitive way for engineers to examine the working of the circuit, and to “see” inside the FPGA during the design process.
NanoBoard development platform
The Nexar package includes an FPGA-based development board called “NanoBoard” that provides a reconfigurable platform for implementing and debugging the design. The NanoBoard can be connected to a PC and uses JTAG-based communications to download the design to the on-board FPGA, and to interact with processor cores and instruments in the design once it has been downloaded.