ACQIRIS now offers dual and single channel 6U CompactPCI streamer analysers featuring an Optical Data Link (ODL), a high-speed optical data transceiver system that provides data streaming at rates of up to 25Gbps.
The new high-speed SC240 and SC210 streamer analysers, incorporating Acqiris' XLFidelity and JetSpeed ADC chipset technology, are designed for use with mass storage devices or subsequent post-processing engines.
They are suitable for data streaming requirements encountered in advanced signal processing applications, such as EW, SIGINT, ELINT, Synthetic Aperture Radar (SAR), as well as in applications requiring scalable real-time data sampling and storage, including radio astronomy.
The new streamer analysers provide onboard high-performance data handling through an FPGA-based Data Processing Unit (DPU).
This allows the acquired data to be passed in its raw state, or with minimal DPU-implemented processing, through the two optical ports compliant with the Serial Front Panel Data Port (SFPDP) protocol.
The standard ODL offers two bi-directional optical links, each capable of simultaneously transmitting and receiving data at up to 2.5Gbps.
The optional high-rate ODL offers ten bidirectional optical data links with an aggregate throughput of up to 25Gbps, or as multiple individual links, each at 2.5Gbps.
Both streamer analyser platforms have 1GHz front-end bandwidth.
The SC240 is ideal for I/Q acquisition, providing two synchronous channels, each with up to 1GS/s sampling rate.
For single channel applications, the two channels of the SC240 can be interleaved to allow up to 2GS/s sampling on either channel, selectable through Acqiris software.
The SC210 offers a single input channel that can be sampled at 1GS/s.
The streamer analysers' DPU, a Virtex II Pro 70 FPGA, is capable of executing multiplications in less than 5ns and offers more than 74,000 logic cells; 328 dedicated 18-bit x 18-bit multipliers with 36-bit results; and nearly 7 Mbits of on-chip processing memory.
Acqiris also offers an optional on-board processing memory extension, providing up to 512MB of DDR SDRAM and 2MB of dual-port SRAM with a read/write throughput of up to 2GB/s to and from the FPGA.
The Data Processing Unit Control (DPU Ctrl2) provides several front-panel digital I/O connectors that offer extended real-time control of the DPU.
Two connectors (I/O P1 and P2) are dedicated to the direct control of the DPU, and a third analogue output signal of a 16-bit on-board DAC (ANL Out) can be used in simple control systems.
For advanced, userdefined system control, the platforms offer an extended I/O port through a front-panel µDB- 15 connector (I/O EXT), which provides up to seven bi-directional differential pairs for communication with the DPU.
Trigger and time base control is even more flexible through the addition of four MMCX connectors (Ctrl I/O), which provide for the use of an external clock (up to 2GHz for the SC240 and 1GHz for the SC210) or an external 10MHz clock reference signal; a trigger output; and two additional I/O digital control lines (I/O A & B).
These control lines can be used to monitor or modify the platforms' status and configuration, or even as a built-in 10MHz source.
If more than two data acquisition channels are required, several streamer analysers can be combined using Acqiris' ASBus, a proprietary high-bandwidth auto-synchronous bus system.
The ASBus handles the distribution of all necessary trigger and clock signals for multichannel applications.
Since each ODL port is independent of the others, as well as of the host PCI bus, each additional streamer analyser platform increases the total data throughput available.